CIMdata PLM Industry Summary Online Archive
17 January 2008
Implementation Investments
Sequence Design's Columbus-AMS to Be Deployed by NEC Corporation in Ultra-High-Speed Digital Designs
Sequence Design's Columbus-AMS is a mainstay in the analog engineering community, but is also proving to be productive for the high-speed digital designers at NEC Corporation in Japan.
According to Koji Saga, Department Manager, CAD Engineering Department, Computers Division, NEC Corporation, his group has been using Columbus for inductance extraction in ultra-high-speed digital designs to accurately analyze clock delays.
NEC has taped out several multi-million gate designs using Columbus extraction technology, one of which is their 65nm SX-9 supercomputer processor, capable of reaching an astounding 102.4GFLOPS per single core. The NEC SX-9 is the world's fastest vector supercomputer.
According to Saga, this device has a clock frequency of more than 1GHz that is delivered to a very large area with minimum clock skew. "When analyzing the clock signal for resistance and capacitance alone, we did not achieve satisfactory silicon correlation," Saga said. "Working with Sequence, we developed a new clock analysis methodology taking inductance into account as well, significantly improving our results and overall quality of the design."
"For aggressive, high-speed digital designs like NEC's, portions of digital designs may also require inductance analysis," said Rob Mathews, Sequence vice president of extraction products. "This lets the designer tighten the clock specs by analyzing the clock tree and including the effects of inductance."
The Columbus extraction product family is part of Sequence's Design-for-Power (DFP) solutions lineup which also includes PowerTheater, CoolPower, CoolCheck, and CoolTime. The Sequence DFP flow provides RTL power management feeding physical implementation tuned to accelerate low power design closure. Columbus provides both a foundation for the company's DFP solutions for SoCs and the industry's leading RLC parasitic extraction tool for high-performance digital and analog/mixed-signal designs. It also includes power-rail extraction and analysis tools for full-custom and SoC designs.
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