CIMdata PLM Industry Summary Online Archive
23 January 2007
Company News
Virage Logic Joins Si2's Low Power Coalition
Silicon Integration Initiative (Si2) announced that Virage Logic has joined Si2's Low Power Coalition (LPC), which is leading a unified effort to create one common format for low-power design, implementation and verification.
"By taking an active role in the Low Power Coalition, we look forward to helping to drive the convergence of low power standardization efforts and the requirements needed from a semiconductor Intellectual Property (IP) perspective which benefits the rapidly growing low power design community," said Mary Ann White, director of business development for Virage Logic. "As the semiconductor industry's trusted IP partner, we have more than 8 years of silicon proven low power IP in volume production. We believe the ultra-low power features and architectures we offer as part of our Area, Speed and Power (ASAP) MemoryTM and ASAP LogicTM product lines will help designers proceed with confidence in their low power designs."
"Virage Logic's commitment to the Low Power Coalition underscores the business-critical nature of effective low-power standards in library modeling, in particular the LPC's stated priorities on a flow-centric approach and focus on convergence to a single standard in the marketplace," said Steve Schulz, president and CEO, Si2 . "Si2 welcomes Virage Logic as a partner dedicated to these business priorities, working alongside a rapidly growing list of leading end-user and EDA companies."
Become a member of the CIMdata PLM Community to receive your daily PLM news and much more.
Tell us what you think of the CIMdata Newsletter. Send your feedback.
CIMdata is committed to your privacy. Your personal information will never be sold or shared outside of CIMdata without your express permission.