CIMdata PLM Industry Summary Online Archive
22 January 2007
Product News
Magma and TOOL Integrate Quartz DRC, Quartz LVS and LAVIS to Speed Physical Verification and Debugging of Large Nanometer Designs
Magma® Design Automation Inc . and TOOL Corporation , a leading developer of EDA tools, announced the integration of Magma's QuartzT DRC and Quartz LVS physical verification solution and TOOL's LAVIS layout visualization platform. Through an easy-to-use GUI these high-performance, high-capacity tools allow users to speed physical verification and debug, accelerating turnaround time and reducing development costs of very large nanometer IC designs.
Quartz DRC and Quartz LVS provide fully scalable physical verification with distributed processing, enabling physical verification of entire multimillion-gate chips in 2 hours. LAVIS, capable of handling very large designs, provides an exceptionally fast visual platform for reviewing verification results. Identified errors can be organized into cell or error type, allowing users to debug them sequentially by viewing them quickly and conveniently on LAVIS. There is no need to wait until DRC jobs complete. Moreover, since LAVIS allows editing a small portion of a large amount of data, users can also fix errors while checking identified errors in the same environment.
"Design complexity increases substantially at 65, 45 and 32 nanometers, and with traditional solutions, physical verification is extremely time consuming at those geometries," said John Lee, general manager of Magma's Physical Verification Business Unit. "Quartz DRC, Quartz LVS and LAVIS share speed and capacity advantages over other solutions, providing mutual customers dramatic acceleration of physical verification, debugging of multimillion-gate designs and significant reduction of turnaround time and costs."
"Adoption of LAVIS, Quartz DRC and Quartz LVS by leading semiconductor vendors is growing rapidly," said Hideaki Hontao, president of TOOL. "We are very pleased to be working with Magma to provide our mutual customers with an integrated, easy-to-use and versatile physical verification and debugging platform."
This solution will be showcased at both companies' booths at the Electronic Design and Solution Fair, Jan. 25-26 in Yokohama, Japan.
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