CIMdata PLM Industry Summary Online Archive
24 September 2007
Implementation Investments
NEC Electronics America Uses Cadence Encounter for High-performance, Low-power ARM11 Processor
Cadence Design Systems, Inc. unveiled that NEC Electronics America, Inc. has used the Cadence® Encounter® digital IC design platform to implement one of the world's highest-performance, low-power ARM11T MPCoreT multicore processors. The success of the dual core implementation of the ARM11 MPCore processor core, rated at over 700MHz and built on 90-nanometer process technology, has prompted NEC Electronics America to add the Encounter platform as one of its tapeout methodologies of choice for ARM processor implementations.
"Previous tools could not achieve our performance objectives. The Cadence Low-Power Solution, including Encounter RTL Compiler and SoC Encounter GXL, allowed us to exceed our performance target of 700 MHz, while still maintaining our robust signal integrity, design for manufacturability, and quality rules," said Ying F. Chang, engineering director, Custom SOC Solutions Engineering, NEC Electronics America. "This important development allows us to offer differentiated, performance-optimized lower-power embedded processors to our customers."
As the result of this development, and after extensive additional qualifications, NEC has now standardized its tapeout methodology on Cadence Encounter RTL Compiler global synthesis and the Cadence SoC EncounterT GXL RTL-to-GDSII system for ASIC designs using ARM processors in various combinations of low-power and high-performance libraries. Importantly, the use of Cadence tools allowed NEC to achieve overall improvements in timing performance and lower power consumption for its ARM11 MPCore processor implementation while still adhering to its electromigration rules-an objective that was not met through competitor tools.
"This implementation of the ARM11 MPCore is the latest result of a joint agreement between ARM and NEC Electronics America in 2003 to develop and promote high-performance multiprocessor solutions based on the ARM11 microarchitecture," said Eric Schorn, VP Marketing, Processor Division, ARM. "The partnership between ARM and Cadence has enabled NEC Electronics America to deliver a very competitive ARM processor-based multicore processor solution that will enable OEMs to meet the stringent performance and power consumption requirements of next-generation, high-volume applications."
"NEC Electronics America uses ARM11 processors in many ASIC projects. The company's ability to achieve the aggressive power and performance requirements of its customers is vital to its success," said Mike McAweeney, vice president of marketing at Cadence. "This switch to the Cadence Encounter platform provided a clear demonstration of Cadence technologies' high-end digital solution, and its advanced implementation capabilities for ARM processors. Furthermore, the Cadence Encounter platform was able to adapt stringent quality rules such as electromigration, into the low-power methodology without impact to performance or power consumption."
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