20 September 2007
Synopsys DesignWare USB 2.0 NanoPHY and PCI Express PHY IP Achieve Compliance in SMIC's 130-NM Process Technology
Synopsys, Inc . announced that its DesignWare® USB 2.0 nanoPHY IP achieved USB logo certification and its PCI Express (PCIe) PHY IP passed compliance testing when implemented in SMIC's popular 130-nm G process technology. As the leading technology provider of complete IP solutions for PCI Express and USB 2.0, Synopsys continues to provide designers with high-quality IP that can be integrated with low risk and speed time to market with increased interoperability and standards compliance.
Optimized for high-volume, power-sensitive applications, the DesignWare USB 2.0 nanoPHY IP provides the best combination of small area and low power. The PHY's unique tunability enables high yield and robust interoperability by allowing designers to quickly adjust for process variation and system parasitics. The DesignWare USB 2.0 nanoPHY is part of a comprehensive solution for USB protocol implementation including OTG digital controllers, host controllers, and verification IP. The silicon-proven DesignWare USB OTG solutions are currently shipping in volume in leading consumer, computing and wireless products.
Compliant with PCI Express 1.1, the DesignWare PHY IP for PCI Express offers the lowest power consumption (up to 50 percent lower than that of competitive solutions), as well as significant performance margin on the receiver and small die area. Its advanced built-in diagnostics engine and ATE test vectors enable at-speed production testing of the PHYs. Additionally, the DesignWare PHY IP for PCI Express offer a number of dedicated lane configurations from x1 to x8 that support both wire-bond and flip-chip packages. The DesignWare PHY IP for PCI Express is part of a comprehensive silicon-proven PCIe solution which includes endpoint, dual mode, root complex and switch IP as well as verification IP.
"Synopsys provides our customers with industry-leading USB and PCIe IP that offers a wide range of advanced features combined with excellent technical support," said Paul OuYang, SMIC marketing and sales. "Combining Synopsys' certified, silicon-proven IP with our manufacturing process technology enables designers to achieve their time-to-market goals, while providing a fast, low-risk path to volume production."
"Working with SMIC to silicon-validate and certify our PCIe and USB IP in their 130-nm G process technology shows our ongoing support to provide customers with industry-leading standards-based connectivity IP," said John Koeter, senior director of marketing for IP and Services at Synopsys. "We understand the critical need to provide designers with high-quality, certified IP solutions that continually evolve with advanced process technologies."
The DesignWare USB 2.0 PHY IP, USB 2.0 nanoPHY IP and the PCI Express PHY IP for the SMIC's 130-nm process are available now.
For more information on DesignWare IP, visit: http://www.designware.com/ .
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