CIMdata PLM Industry Summary Online Archive
18 September 2007
Implementation Investments
MediaTek, Inc. Adopts Mentor Graphics Formal Verification Technology for Next Generation Designs
Mentor Graphics Corporation announced that MediaTek has selected the 0-In® Formal Verification technology for its functional verification methodology. MediaTek chose the 0-In Formal Verification technology to make it an integral part of their verification flow for their next generation design projects.
MediaTek's complex multimedia designs require thorough verification at the RTL level to confirm interface compliance and the functionality of control logic. MediaTek uses the 0-In Formal Verification technology for bug hunting, which is the process of pinpointing errors during functional verification and analyzing assertions that focus on verification hot spots.
"There is an evolution in designers' work that is moving towards increased verification requirements," said Robert Hum, vice president and general manager of Mentor Graphics Design Verification and Test division. "To address these needs, designers need to adopt early, aggressive formal methods to reduce design cycles and improve design quality. 0-In Formal Verification technology has a proven track record of delivering the capability, performance and features needed to complete this critical task."
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