CIMdata PLM Industry Summary Online Archive
1 August 2007
Product News
Cadence and SMIC Collaboration Validates RF Design Kit for Wireless IC Design
Cadence Design Systems, Inc . and Semiconductor Manufacturing International Corporation ( SMIC ) announced the availability of a new SMIC RFCMOS 180-nanometer process design kit (PDK) that supports the Cadence® RF Design Methodology Kit. The new SMIC PDK has been successfully validated and is now available to the RF IC design market. Validation has included silicon correlation tests on representative design IP such as phase lock loops, focusing on simulation results and postlayout parasitics.
The new solution provides wireless chip designers in China access to the design software and methodologies necessary to achieve shorter, more predictable design cycles by helping to ensure that silicon performance matches design intent. As part of their joint effort and to ensure widespread adoption, Cadence and SMIC will jointly host RF IC methodology workshops and provide RF kit applicability consulting to RF designers in China. RF design workshops are planned for Shanghai (Aug. 2), Beijing (Aug. 7) and Shenzhen (Aug. 9).
"We are excited about this jointly developed RF design solution that will help our mutual customers in China design and deliver high-quality RF devices," said Lee Yang, fellow of the RF Group at SMIC. "We have worked diligently with Cadence to provide this level of design capability to our customers, and we are continuing our close partnership with Cadence to develop RF IC solutions based on our 130-nanometer and 90-nanometer RFCMOS processes."
SMIC has been employing the RF design kit while working jointly on the National High-Technology Research and Development Program (863 Projects) with two of China's leading institutes based on its own RFCMOS technology. SMIC is expecting to extend the development effort to 130-nanometer and 90-nanometer nodes as part of the Shanghai Innovation Initiative Programs for RF Core IP development.
The Cadence RF Design Methodology Kit includes an 802.11 b/g WLAN segment representative design, a full suite of block-, chip-, and system-level testbenches, simulation setups, test plans, and applicability consulting on the RF design and analysis methodologies. The kit focuses on top-down RF IC design and full-chip verification, and addresses behavioral modeling, circuit simulation, layout, parasitic extraction and re-simulation, and inductor synthesis. It also focuses on IC verification within a system context, leveraging system-level models and testbenches for use by designers in the IC environment.
"We are pleased with our joint work with SMIC, which results in improved quality and productivity in the design of RF devices for our mutual customers in the Chinese RF design market," said Craig Johnson, corporate vice president of Marketing at Cadence. "As we continue our collaboration in the RF area, we will jointly engage customers through hands-on workshops and RF applicability consulting."
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