CIMdata PLM Industry Summary Online Archive
31 May 2007
Product News
Chartered and Mentor Graphics Team to Offer Technology Design Kits for 65 and 90 Nanometer Common Platform Technology Processes
Mentor Graphics Corporation and Chartered Semiconductor Manufacturing have partnered to offer a series of new mixed-signal Technology Design Kits (TDKs) supporting 65- and 90-nanometer (nm) process technology available from Chartered. The kits have been validated and are available now for use with Mentor Graphics ICstudioT design platform. These open-source design kits enable IC design companies to set up their design environments and immediately focus on mixed-signal design and productivity gains on leading-edge technology from Chartered.
The new TDKs enable the entire analog mixed-signal IC design flow to be tailored for customers using Common Platform technology processes. The kits provide all the foundry data files and models for use with front-end and back-end IC design tools from Mentor Graphics. Designers can work within the unified design cockpit of Mentor's ICstudio design environment to move seamlessly between designs in front-end logical and back-end physical domains.
"Access to optimized design platforms that shorten critical chip development cycles is of paramount importance to foundry customers facing the challenges of today's market. Such challenges make Chartered's open, third-party EDA and IP strategy even more relevant," said Kevin Meyer, vice president of worldwide marketing and platform alliances at Chartered. "By combining Chartered's production-proven mixed-signal processes with world-class EDA flows from Mentor Graphics, we allow our mutual customers to gain full control and predictability over SoC design and manufacturing to jump-start their designs and plan for aggressive tape-out and production schedules. This is their competitive advantage."
"We understand the time-to-market pressures facing companies, and realize that their design engineers must focus on product development, rather than setting up IC design environments," said Jue-Hsien Chern, vice president and general manager, Deep Submicron division at Mentor Graphics. "At Mentor, we're committed to helping our customers maximize their productivity, especially as they move to more advanced semiconductor technologies in order to stay competitive in their markets. Our design kit collaboration with Chartered as a leading mixed-signal foundry yields a proven design-through-manufacturing flow that saves time and eliminates costly re-spins."
"We are pleased to see the collaboration between Chartered and Mentor Graphics, as we see tremendous value being created for their end customers like us," said Godfrey D'Souza, vice president of engineering at Cswitch Corporation. "At Cswitch, we develop configurable solutions that address the performance and time-to-market needs of network, telecom, and storage equipment manufacturers. Gaining collaborative support from our EDA and manufacturing suppliers like Mentor and Chartered will enable us to put more focus on advancing our development technologies, methodologies, and intellectual property base, especially as we move to the more advanced manufacturing process node on 65nm and beyond."
Starting with 90nm generic and 65nm low-power nodes, Chartered and Mentor Graphics plan to broaden the TDK offerings to encompass 65 and 90nm process variants, as well as extend the development to 45nm. These TDKs tuned to the Common Platform technology processes from Chartered enable chip designers to immediately begin creating, simulating and verifying mixed-signal or analog transistor-level designs targeted for manufacturing at Chartered. Additionally, both companies in support of advanced technologies offered by Chartered are validating them. The design kits specifically include: pre-configured symbols and netlist configuration files for schematic capture, Eldo® analog simulation models for functional verification, process definition files and device generators for schematic-driven physical layout, and pre-validated Calibre® DRCT, Calibre LVST and Calibre xRCT extraction rule files for final physical verification and parasitic extraction prior to chip manufacturing.
Mentor's new ICstudio design environment contains a unified design platform with a centralized design cockpit that allows seamless navigation throughout the entire analog mixed-signal IC design flow, from schematic capture, simulation and floor planning, to physical layout and final verification.
Availability
The Mentor Graphics Technology Design Kits for 90nm generic and 65nm low-power processes from Chartered are available now. For more information, please visit either http://www.charteredsemi.com/design/tdks.asp or http://www.mentor.com/products/ic_nanometer_design/foundries/tdks.cfm .
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