CIMdata PLM Industry Summary Online Archive
29 May 2007
Events News
Verigy and Mentor Graphics to Co-Host Semiconductor Manufacturing Yield Learning and Logic Diagnosis Seminar Series
Verigy , a premier semiconductor test company, and Mentor Graphics Corp . are co-hosting a series of three half-day seminars in June on the latest advances in yield learning and logic diagnosis for semiconductor manufacturing.
Intended for product engineers, failure analysis engineers, test engineers, managers and executives interested in understanding how to ramp yield more effectively, the seminars will feature industry experts from Verigy and Mentor Graphics discussing advanced techniques for closing the gap between test, diagnosis and yield learning.
Seminar participants will hear presentations from Verigy and Mentor, which will introduce and propose solutions for:
• Collection of massive amounts of fail log data in production environments;
• Delivering "zero overhead" data collection from automated test equipment;
• Fast and accurate layout aware diagnosis from compressed test patterns;
• Statistical post-processing of the results;
• Calculation of feature based failure rates.
Registration Details
The Mentor/Verigy Yield Learning and Logic Diagnosis Seminars will be held in San Jose, Calif., on June 12; Austin, Texas, on June 19; and Waltham, Mass., on June 21, from 10 a.m. to 2:30 p.m., and lunch will be provided. Advance registration is required, but there is no cost to attend. Registration is available at the Verigy Web site at http://www.verigy.com/go/events .
Become a member of the CIMdata PLM Community to receive your daily PLM news and much more.
Tell us what you think of the CIMdata Newsletter. Send your feedback.
CIMdata is committed to your privacy. Your personal information will never be sold or shared outside of CIMdata without your express permission.