CIMdata PLM Industry Summary Online Archive
15 May 2007
Product News
UMC Expands Support for Mentor Graphics' Calibre YieldAnalyzer to Deliver Production Proven DFM Flow
Mentor Graphics Corporation announced that UMC has expanded its support for the Calibre® nm Platform with Calibre YieldAnalyzerT for all major design flows for its 90 nanometer (nm) and 65nm processes. Mentor and UMC have worked collaboratively to introduce Design for Manufacturing (DFM) capabilities that give designers highly valuable information to guide physical design improvements that can increase production yields.
As volume IC production moves to sub-100nm, manufacturing costs increase dramatically and yield is increasingly sensitive to both random and systematic defects and process variations. Calibre YieldAnalyzer can mitigate one source of yield loss by performing critical area analysis (CAA), providing information about how random process defects, such as unwanted particles, result in layout pattern shorts and opens that reduce yield. Designers can use CAA information to modify layouts to reduce the probability of incurring these failures in production.
The DFM collaboration between Mentor Graphics and UMC started in 2005 with the creation of production decks to enable Mentor's Calibre YieldEnhancerT for UMC's 180nm through 65nm processes. YieldEnhancer reduces systematic defects with a variety of pattern enhancements, such as inserting redundant "Vias" and other techniques to improve as-built circuit integrity. YieldEnhancer production decks, as well as the new silicon verified decks for Calibre YieldAnalyzer users, are available upon request through UMC customer representatives.
"Our long-term relationship makes Mentor Graphics a natural choice as an ongoing EDA partner for CAA," said Patrick Lin, Chief SoC Architect, System and Architecture Support at UMC. "We have found that the Calibre YieldAnalyzer tool produces results with excellent correlation to our internal data standard. This work complements our existing Calibre YieldEnhancer Via-doubling decks that also provide excellent coverage and outstanding throughput performance for layout enhancement. We believe our support for Calibre's DFM tools provides a valuable advantage for our mutual customers."
"YieldAnalyzer and YieldEnhancer are just two components of the expanding Calibre nm Platform first introduced a year ago with nmDRC," said Joe Sawicki, vice president and general manager of the Design-to-Silicon division at Mentor Graphics. "Building on our powerful, production-proven Hyperscaling architecture, we are delivering the broadest, most accurate, and best performing DFM solutions in the industry. Because the Calibre platform is built on standard open database interfaces, it brings production proven DFM capabilities to UMC customers, independent of the design creation environment they use."
About the Calibre DFM Platform
Mentor Graphics offers a full range of DFM analysis and enhancement solutions for random, systematic, and parametric process issues affecting production yield. Calibre nmDRC is an industry standard for physical verification, with Hyperscaling technology that supports simultaneous execution on up to 100 CPUs for dramatically improved runtimes. Calibre LVS is a market-leading layout vs. schematic physical verification tool, which extracts the most advanced device properties from state-of-the-art device models. Calibre xRCT and xL parasitic extraction tools deliver accurate interconnect models, and their hierarchical structure provides breakthrough performance even for very large designs. Calibre YieldAnalyzer combines critical area analysis (CAA) and critical feature analysis (CFA) into a single integrated solution. YieldEnhancer recommends and performs specific layout modifications, such as via doubling, via extensions and enclosures, to increase production yield. Calibre LFDT addresses issues related to lithographic process effects by modeling the effects of process variability on both devices and interconnects, and identifying layout "hot spots" that can be improved to ensure higher yield. Calibre nmOPC, OPCproT, OPCverifyT and other related tools provide a complete solution for layout resolution enhancement and mask data preparation. Dense simulation, contour-based design intent constraints, Cell Broadband Engine compatibility, and other innovations allow the Calibre environment to deliver accuracy and performance at the lowest cost of ownership.
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