CIMdata PLM Industry Summary Online Archive
30 April 2007
Implementation Investments
Cadence Encounter And SiP Design Technologies Used By STMicroelectronics To Implement World'S First 65nm Dual High-Definition Mpeg-4 Decoder
Cadence Design Systems, Inc. said the Cadence Encounter digital IC design platform and system-in-package (SiP) design technology were integral to the successful implementation of STMicroelectronics' industry-first, 65-nanometer STi7200, a high-performance, dual high-definition (HD) decoder for digital consumer applications such as set-top boxes, high-definition DVDs (dual-standard Blu-ray and HD-DVD) and digital TVs. The development reinforces Cadence's position as a EDA partner for high-end 65nm system-on-chip (SoC) designs.
"Cadence worked hand-in-hand with our design teams to ensure that the Cadence high-end digital and SiP design technologies were able to handle this design, which is the most complex and advanced SoC we have ever undertaken," said Thierry Bauchon, R&D Director, Home Entertainment & Displays Group of STMicroelectronics. "The result was that the chip, unveiled at the Consumer Electronics Show in January 2007, was manufactured on-time and functioned correctly, enabling customers' demonstrations in the month following sample availability in our labs."
"Cadence's hierarchical methodology for advanced 65nm designs allowed us to smoothly transition from concept to design and even enabled silicon-package co-design of our high performance DDR2 interface," continued Bauchon. "This was a non-trivial task, but Cadence's Encounter and SiP design technologies helped us achieve the first-silicon success, with DDR2 interfaces full functional at 667MHz targeted specification."
Announced at the Consumer Electronics Show (CES) on January 8 and intended for the fast growing market of digital set-top boxes, digital TVs and high-definition DVD players, the new chip underscores the increasingly important role played by integrated circuit design in today's consumer electronics market. STMicroelectronics' new dual-video-stream high-definition (HD) decoder chip, the STi7200, is the first to simultaneously decode two high-definition video streams, providing consumers with a variety of viewing and recording options. The highly integrated SoC supports both the HD DVD and Blu-ray formats and is the world's first such device produced in a 65nm process technology to deliver lower power consumption and competitive pricing.
With over five million instances and 740 I/Os, the device is also one of the largest and most complex chips in STMicroelectronics' lineup. Preliminary tests validated the chip's functionality within hours of receiving the first silicon of the device.
"This achievement underscores not only the technical leadership of our high-end digital design and SiP technologies, but also highlights the overall value of our partnership as a key enabler of advanced digital content for consumer products," said Craig Johnson, corporate vice president of marketing for Cadence Design Systems. "This is a leading edge, high-performance design for high-volume consumer applications, and truly, the stakes could not have been much higher. Through our partnership, the Cadence design solutions were able to deliver a superior product with significantly reduced development cycles."
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