CIMdata PLM Industry Summary Online Archive
16 April 2007
Product News
Denali Launches New Product to Speed System-On-Chip Verification
Denali Software, Inc. announced the availability of PureSpecT SystemRDL, a verification IP (VIP) product that automates functional verification of configuration registers for system-on-chip (SoC) designs. Configuration registers are used in all semiconductor chips, often numbering in the tens of thousands, to store key data that defines the chip's operation. Denali's PureSpec SystemRDL eliminates the tedious and error-prone process of manually verifying register operations, and enables engineers to automate low-level structural testing, generate functional coverage models, and quickly expose potential errors in the SoC design. A more complete overview of PureSpec SystemRDL technology and applications is provided via webcast at: http://www.denali.com/webcast/purespec_systemrdl .
"PureSpec SystemRDL fills an important niche for design and verification engineers," states Sean Smith, chief verification architect at Denali. "We are automating the task of creating verification data structures and functional coverage models for register structures. Even for initial customers, this has translated a tedious 3-6 week effort into a 1-2 days process, which is significant for any chip design effort."
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