CIMdata PLM Industry Summary Online Archive
27 March 2007
Implementation Investments
Renesas Technology Chooses Synopsys IC Compiler Solution for SoC Design Flow
Synopsys, Inc. announced that Renesas Technology Corp. has adopted Synopsys' IC Compiler next-generation place-and-route solution for its production IC design flow. The growing complexity of Renesas' designs required them to meet timing in several different functional modes. After thoroughly evaluating all available options, Renesas selected Synopsys' IC Compiler solution for its ability to achieve desired chip performance by concurrently optimizing all timing modes through its true multi-mode capability. Renesas also reaped the benefits of significantly faster turnaround time and enhanced ease-of-use.
"Having our chips work at high speed across many different functional modes has been a growing challenge for us, even with mainstream consumer designs," said Teruaki Harada, department manager, DFM & EDA Technology Development Dept. at Design Technology Div. at Renesas Technology Corp. "We have relied on Synopsys tools to help us with our many challenging designs and now, with the IC Compiler solution, we have addressed the very pressing issue of multi-mode timing."
Renesas evaluated all available multi-mode approaches, including sequential and merging techniques, using a demanding set of 15 test cases which included a large 0.13-micron consumer design with more than 3.5-million gates and 5 operating modes. Renesas found that the IC Compiler solution satisfied all requirements and delivered desired performance for multi-mode optimization. The IC Compiler physical implementation solution relies on Extended Physical Synthesis (XPS) technology to increase optimization efficiency, which not only offered Renesas improved clock speed results, but also enabled the designers to reduce the total cell area of the design. XPS is a new architecture that combines synthesis, placement, clock and routing into a unified optimization environment. As a result, Renesas found the IC Compiler solution to be faster and significantly easier to use than alternate solutions, even for single-mode designs.
"Renesas has a long history of working closely with Synopsys on their most challenging designs," said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "By selecting our IC Compiler solution for its true concurrent multi-mode optimization capability, Renesas can now reduce design time while increasing performance."
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