CIMdata PLM Industry Summary Online Archive

19 December 2005

Implementation Investments

Synopsys' PSM Technology Adopted by NEC Electronics for 65-nm Production and Beyond

Synopsys, Inc. announced that NEC Electronics has adopted Synopsys' phase-shift mask (PSM) technology for production of its high-performance 65-nanometer (nm) processor and logic chips. By implementing this key technology, which is part of Synopsys' comprehensive design for manufacturing (DFM) solution, NEC Electronics can enhance yields, decrease leakage current, and maximize chip performance through tight critical dimension control over the lithography process.

Synopsys PSM technology is being increasingly deployed by high-performance system-on-chip (SoC) manufacturers worldwide. It gives designers the benefit of tighter control of critical dimension (CD), the width of feature sizes on the silicon, and enhanced lithography resolution that is critical at the 65-nm node and beyond. The benefit of this tighter CD is increased chip performance and higher yield, which means more dies on the wafer meet design specifications. Synopsys' PSM technology will be used to support the ramp of NEC Electronics' 65-nm CMOS process.

"To increase the performance of our products, we must move to deeper submicron processes and adopt technology that addresses unique manufacturing requirements," said Shuichi Inoue, general manager of the Manufacturing Operations Unit at NEC Electronics. "Synopsys' PSM technology substantially enhances the resolution of our existing lithography equipment enabling us to increase our yields, decrease leakage current, and improve our chip performance at the 65-nanometer node.

"We work closely with our customers to develop processes which accelerate high-yield chip production on advanced process nodes," said Anantha Sethuraman, vice president of marketing for DFM, Synopsys. "Synopsys' PSM technology is a proven solution for delivering the lithography resolution required for the 65-nanometer process node. This success further validates Synopsys' leadership position in providing a comprehensive DFM solution for high-yield designs at 65 nanometers and beyond."

Synopsys' DFM product family addresses critical manufacturability and yield issues with the following DFM products: HerculesT physical verification, Proteus mask synthesis, CATS® mask data preparation, SiVL® lithography verification, i-Virtual StepperT mask defect dispositioning, patented PSM technology, and physics-based TCAD suite of simulation products. Its production-proven phase-shifting technology and software enables semiconductor manufacturers to more reliably and cost-effectively fabricate subwavelength integrated circuits (ICs) using available optical lithography equipment. The company's phase-shifting technology is the only commercially available strong phase-shifting technology currently used in IC production. This technology has been used to fabricate transistors as small as 9 nanometers using 248-nm lithography equipment - dramatically smaller than the 30-nm transistors used at the 65-nm process node. Synopsys' Manufacturing Yield Management (MYM) solutions extend directly into the fab, providing customers real time access to the yield data and the analysis capability needed to reduce random, systematic and parametric defects. This accelerates the introduction of new designs by significantly reducing the time it takes to get from concept to manufacturing. Synopsys takes a systematic approach to design for manufacturing that makes intelligent use of design and manufacturing data throughout its entire flow to help ensure that designs at 65 nanometers (nm) and smaller geometries will achieve desired yield goals.

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