CIMdata PLM Industry Summary Online Archive

19 December 2005

Implementation Investments

Samsung Electronics Implements a 90-Nanometer, 13-Million-Gate, Low-Power SoC with Magma's Integrated Physical Design Flow; Automated Methodology Enables Use of Advanced Low-Power Features, Shaves Weeks off Design Cycle

Magma® Design Automation Inc. announced that Samsung Electronics has introduced a 90-nanometer (nm), 13-million-gate system on chip (SoC) for mobile applications using Magma's Blast Fusion® , Blast PowerT , Blast RailT NX and Blast Noise® . With the Magma software's integrated low-power and physical design capabilities, Samsung was able to meet its power, timing, signal integrity and area goals while accelerating the design cycle. Magma looks forward to supporting Samsung in further implementations of 90- and 65-nm designs.

"At the 90-nm node, minimizing power and ensuring uniform power distribution, while managing timing closure is a challenge," said K.M. Choi, PhD., vice president, CAE, Systems LSI Division, Samsung Electronics. "By enabling continuous power, timing and area tradeoffs throughout the design flow, Blast Fusion and Blast Power greatly increased the design team's productivity and allowed them to meet the performance goals. Blast Power's automated multi-threshold CMOS (MTCMOS) switch insertion capabilities proved extremely useful during the chip's implementation phase and MTCMOS implementation helped us to reduce leakage power by a factor of 100."

"As a global leader in semiconductor technology, Samsung requires best-in-class electronic design automation (EDA) solutions," said Premal Buch, general manager of Magma's Design Implementation Business Unit. "Samsung has been a key partner for Magma, especially on low power, and their success on this large, 90-nm low-power design highlights the software's advanced capabilities."

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