CIMdata PLM Industry Summary Online Archive
5 December 2005
Product News
Cadence Completes Digital Product Line Segmentation with Introduction of Encounter GXL Technologies
Cadence Design Systems, Inc . announced that it has completed its new product segmentation strategy for the Cadence® Encounter® digital IC design platform announced at CDNLive! in September of this year. The now fully segmented Cadence Encounter platform provides customers with multiple levels of technology tailored to specific levels of digital IC design complexity.
The Encounter offerings comprise three levels, Encounter L, XL and GXL. The Encounter L product series provides an easy-to-use, integrated, value-priced implementation environment for less complex, flat designs at 150 nanometers and above with gate counts below 5 million. The Encounter XL product series targets large-scale, high-performance, hierarchical designs over 5 million gates. The third series, Encounter GXL, announced today, caters to leading-edge, very high performance designs at 65 nanometers and beyond.
Three separate Cadence press releases discussing this news in greater detail were issued today.
New Cadence SoC Encounter GXL Addresses Customers' Nanometer Design Yield and Variation Challenges-Yield Aware RTL to GDS Implementation Flow Targets Leading-Edge Designs at 65nm and Beyond
Cadence Extends Synthesis Technology Lead and Announces Encounter RTL Compiler GXL-New Global Synthesis Technology Boosts Quality of Silicon and Productivity
New Cadence Encounter Conformal Low Power GXL Addresses Customer Verification Challenges-New Conformal Technology Reduces Risk of Functional Errors for Designs at 65nm and Beyond
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